1. Field of the Invention
The present invention relates to a semiconductor device.
2. Description of Related Art
In a memory device such as a DRAM (Dynamic Random Access Memory) device, peripheral circuits such as a subword driver and a sense amplifier are formed around a memory mat which is a circuit for storing data.
In a memory mat, capacitors formed on a contact layer called a capacitor contact are arranged in a matrix. Formation of such a capacitor generally requires a trimming process of removing an interlayer dielectric film around the capacitor by wet etching. In the trimming process, however, a solution used in wet etching may penetrate into a peripheral circuit to reduce in product yield and product quality.
The semiconductor device disclosed in JP2010-165742A prevents a solution used in wet etching from penetrating from a side portion or an upper surface of a memory mat into a peripheral circuit by forming a support film made of, for example, silicon nitride above an interlayer oxide film around a capacitor contact such that the support film surrounds the memory mat. The semiconductor device disclosed in JP2010-165742A, however, may be unable to prevent a solution used in wet etching from penetrating into a peripheral circuit.
The problem will be described below with reference to FIGS. 1 and 2. Note that FIG. 1 is a top view of a memory mat and FIG. 2 is a cross-sectional view of the memory mat taken at an outer peripheral portion (along line B-B′ in FIG. 1). FIGS. 1 and 2 have written notes on a problematic phenomenon, and the like.
As shown in FIGS. 1 and 2, each capacitor 1 of memory mat 10 is formed on capacitor contact 2. However, the position of each capacitor 1 and that of corresponding capacitor contact 2 may not coincide exactly with each other due to, for example, constraints on the memory device layout, and pattern misalignment by photolithography, which leads to deviation of capacitor 1 from capacitor contact 2, as shown in FIG. 2.
Deviation of capacitor 1 has been conventionally prevented by inserting a pad between capacitor 1 and capacitor contact 2. In recent years, miniaturization of semiconductor devices has increased use of double patterning in pad formation, which has led to an increase in the cost required to form a pad. For this reason, pad-less technology that uses no pad has been progressing, resulting in an increase in deviation of capacitor 1.
Along with miniaturization of capacitors, lower electrode 1A of capacitor 1 is becoming thinner. A solution used in wet etching may thus penetrate through lower electrode 1A into a portion below lower electrode 1A. If capacitor 1 deviates from capacitor contact 2, the solution penetrates into interlayer oxide film 3 around a capacitor contact which is located below capacitor 1 in large amounts.
In particular, if capacitor 1 at an outermost peripheral portion of memory mat 10 deviates from capacitor contact 2, a solution will penetrate into a peripheral circuit through interlayer oxide film 3 around capacitor contact 2 to cause large-scale dissolution of interlayer oxide film 3 in the peripheral circuit.
Even if a solution penetrates into interlayer oxide film 3, recovery is possible as long as the penetration falls within the memory mat 10. If a solution penetrates into a peripheral circuit, recovery will be very difficult. It is thus important to prevent a solution from penetrating into a peripheral circuit.
In contrast, the semiconductor device disclosed in JP2010-165742A is based on the assumption that a pad is inserted between a capacitor and a capacitor contact and does not take into consideration deviation of the capacitor. Since a support film is only formed above an interlayer oxide film around the capacitor contacts, the semiconductor device cannot prevent a solution from penetrating into a peripheral circuit through the interlayer oxide film around capacitor contacts.